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 5-V Low-Drop Fixed Voltage Regulator
TLE 4270
Features * * * * * * * * * * * Output voltage tolerance 2 % Low-drop voltage Integrated overtemperature protection Reverse polarity protection Input voltage up to 42 V Overvoltage protection up to 65 V ( 400 ms) Short-circuit proof Suitable for use in automotive electronics Wide temperature range Adjustable reset time ESD protection > 4000 V Ordering Code Package
P-TO220-5-11 (P-TO220-5-1)
Type TLE 4270 TLE 4270 S TLE 4270 G w TLE 4270 w TLE 4270 S w TLE 4270 G q TLE 4270 D
Q67000-A9209-A903 P-TO220-5-11 Q67000-A9243-A904 P-TO220-5-12 Q67006-A9201-A901 P-TO263-5-1 Q67000-A9209-A801 P-TO220-5-1 Q67000-A9243-A802 P-TO220-5-2 Q67006-A9201-A802 P-TO220-5-8 Q67006-A9360 P-TO252-5-1
P-TO220-5-12 (P-TO220-5-2)
P-TO263-5-1 (P-TO220-5-8)
w Not for new design Functional Description
q New type
This device is a 5-V low-drop fixed-voltage regulator. The maximum input voltage is 42 V (65 V, 400 ms). Up to an input voltage of 26 V and for an output current up to 550 mA it regulates the output voltage within a P-TO252-5-1 (D-PAK) 2 % accuracy. The short circuit protection limits the output current of more than 650 mA. The device incorporates overvoltage protection and temperature protection that disables the circuit at unpermissibly high temperatures.
Semiconductor Group 1 1998-11-01
TLE 4270
Pin Configuration (top view)
P-TO220-5-11 (P-TO220-5-1)
P-TO220-5-12 (P-TO220-5-2)
P-TO263-5-1 (P-TO220-5-8)
1 RO D GND Q
5
1
5
1
5
AEP01922
P-TO252-5-1 (D-PAK)
D RO GND Q
AEP01923
GND
GND Q RO D
AEP02172
1 RO DQ
5
AEP02580
Figure 1 Pin Definitions and Functions Pin 1 2 3 4 5 Symbol I RO GND D Q Function Input; block to ground directly on the IC with ceramic capacitor Reset Output; the open collector output is connected to the 5 V output via an integrated resistor of 30 k. Ground; internally connected to heatsink. Reset Delay; connect a capacitor to ground for delay time adjustment. 5-V Output; block to ground with 22 F capacitor, ESR < 3 .
2 1998-11-01
Semiconductor Group
TLE 4270
Application Description The IC regulates an input voltage in the range of 5.5 V < VI < 36 V to VQnom = 5.0 V. Up to 26 V it produces a regulated output current of more than 550 mA. Above 26 V the save-operating-area protection allows operation up to 36 V with a regulated output current of more than 300 mA. Overvoltage protection limits operation at 42 V. The overvoltage protection hysteresis restores operation if the input voltage has dropped below 36 V. A reset signal is generated for an output voltage of VQ < 4.5 V. The delay for power-on reset can be set externally with a capacitor. Design Notes for External Components An input capacitor CI is necessary for compensation of line influences. The resonant circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1 in series with CI. An output capacitor CQ is necessary for the stability of the regulating circuit. Stability is guaranteed at values of CQ 22 F and an ESR of < 3 . Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of a series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If the output voltage decreases below 4.5 V, an external capacitor CD on pin 4 (D) will be discharged by the reset generator. If the voltage on this capacitor drops below VDRL, a reset signal is generated on pin 2 (RO), i.e. reset output is set low. If the output voltage rises above 4.5 V, CD will be charged with constant current. After the power-on-reset time the voltage on the capacitor reaches VDU and the reset output will be set high again. The value of the power-on-reset time can be set within a wide range depending of the capacitance of CD. The IC also incorporates a number of internal circuits for protection against: * * * * Overload Overvoltage Overtemperature Reverse polarity
Semiconductor Group
3
1998-11-01
TLE 4270
Temperature Sensor
Saturation Control and Protection Circuit 5 Output
Input
1
Control Amplifier Adjustment Bandgap Reference + -
Buffer
Reset Generator
2 Reset Output 4 Reset Delay
3 GND
AEB01924
Figure 2 Block Diagram
Semiconductor Group
4
1998-11-01
TLE 4270
Absolute Maximum Ratings Tj = - 40 to 150 C Parameter Symbol min. Input Voltage Voltage Current Reset Output Voltage Current Reset Delay Voltage Current Output Voltage Current Ground Current Temperatures Junction temperature Storage temperature Limit Values max. Unit Notes
VI VI II
- 42
42 65
V V
t 400 ms
internally limited
VR IR
- 0.3
7
V Internally limited
VD ID
- 0.3
7
V Internally limited
VQ IQ
- 1.0
16
V Internally limited
IGND
- 0.5
-
A
-
Tj Tstg
- 50
150 150
C C
-
Optimum reliability and life time are guaranteed if the junction temperature does not exceed 125 C in operating mode. Operation at up to the maximum junction temperature of 150 C is possible in principle. Note, however, that operation at the maximum permitted ratings could affect the reliability of the device.
Semiconductor Group
5
1998-11-01
TLE 4270
Operating Range Parameter Input voltage Junction temperature Thermal Resistance Junction ambient Junction case Symbol Limit Values min. max. 42 150 V C - - 6 - 40 Unit Notes
VI Tj
Rthja Rthjc Zthjc
- -
65 70 3 2
K/W K/W K/W K/W
TO263, TO2521)
t < 1 ms
(TO-220/263 Packages)
1)
Soldered in, min. footprint
Characteristics VI = 13.5 V; - 40 C Tj = 125 C (unless otherwise specified) Parameter Output voltage Output voltage Output current limiting Current consumption Iq = II - IQ Current consumption Iq = II - IQ Current consumption Iq = II - IQ Drop voltage Symbol min. Limit Values typ. 5.00 5.00 850 1 max. 5.10 5.10 - 1.5 V V mA mA 5 mA IQ 550 mA; 6 V VI 26 V 26 V VI 36 V; IQ 300 mA 4.90 4.90 650 - Unit Test Condition
VQ VQ IQmax Iq
VQ = 0 V IQ = 5 mA
Iq
-
55
75
mA
IQ = 550 mA
Iq
-
70
90
mA
IQ = 550 mA; VI = 5 V
Vdr
-
350
700
mV
IQ = 550 mA1)
Semiconductor Group
6
1998-11-01
TLE 4270
Characteristics (cont'd) VI = 13.5 V; - 40 C Tj = 125 C (unless otherwise specified) Parameter Load regulation Supply voltage regulation Power supply Ripple rejection Reset Generator Switching threshold Reset High voltage Reset low voltage Reset low voltage Reset pull-up Lower reset timing threshold Charge current Upper timing threshold Delay time Symbol min. Limit Values typ. 25 12 54 max. 50 25 - mV mV dB - - - Unit Test Condition
VQ VQ PSRR
IQ = 5 to 550 mA; VI = 6 V VI = 6 to 26 V IQ = 5 mA fr = 100 Hz; Vr = 0.5 VSS
VRT VROH VROL VROL R VDRL Id VDU
4.5 4.5 - - 18 0.2 8 1.4 - -
4.65 - 60 200 30 0.45 14 1.8 13 -
4.8 - - 400 46 0.8 25 2.3 - 3
V V mV mV k V A V ms s
- -
Rintern = 30 k2); 1.0 V VQ 4.5 V IR = 3 mA, VQ = 4.4 V
internally connected to Q
VQ < VRT VD = 1.0 V
-
td Reset reaction time tRR
Overvoltage Protection Turn-Off voltage
1) 2)
CD = 100 nF CD = 100 nF
VI, ov
42
44
46
V
-
Drop voltage = VI - VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input) Reset peak is always lower than 1.0 V.
Semiconductor Group
7
1998-11-01
TLE 4270
1000 F
1 470 nF TLE 4270G
5
Q
22 F
2
R
VQ VR
V VD
4
D
CD
3
GND
AES01925
Figure 3 Test Circuit
Input
1
5
5 V-Output
470 nF Reset to MC 2
TLE 4270
4 3 100 nF
AES01926
22 F
Figure 4 Application Circuit
Semiconductor Group 8 1998-11-01
TLE 4270
V
< t RR
VQ
V RT
dV d = dt C d
V D V DU V DRL td VR t RR
Power-on-Reset
Thermal Shutdown
Voltage Drop Undervoltage at Input
Secondary Spike
Load Bounce
AES01927
Figure 5 Time Response
Semiconductor Group
9
1998-11-01
TLE 4270
Output Voltage VQ versus Temperature Tj
5.20
AED01928
Output Voltage VQ versus Input Voltage VI
12
AED01929
VQ
V 5.10
VQ V = 13.5 V
V 10
5.00
8
4.90
6
R L = 25
4.80
4
4.70
2
4.60 -40
0 0 40 80 120 C 160 Tj
0
2
4
6
8 V 10 V
Output Current IQ versus Temperature Tj
1200
AED01930
Output Current IQ versus Input Voltage VI
1.2
AED01931
Q
mA 1000
Q
A 1.0
T j = 25 C
800
0.8
600
0.6
T j = 125 C
400
0.4
200
0.2
0 -40
0
0 40 80 120 C 160 Tj
0
10
20
30
40 V 50 V
Semiconductor Group
10
1998-11-01
TLE 4270
Current Consumption Iq versus Output Current IQ
6
AED01932
Current Consumption Iq versus Output Current IQ
80 mA q 70 60
AED01933
q
mA 5
4
50 40
3
V = 13.5 V
V = 13.5 V
2
30 20
1
10 0
0
0
20
40
60
80
mA Q
120
0
100
200
300
400
mA Q
600
Current Consumption Iq versus Input Voltage VI
120
AED01934
Drop Voltage Vdr versus Output Current IQ
800 mV V Dr 700 600
AED01935
q
mA 100
80
500
T j = 125 C
60
400
R L = 10
300
40
R L = 20
20
R L = 50
200 100 0
Tj
=25 C
0
0
10
20
30
40 V 50 V
0
200
400
600
mA Q
1000
Semiconductor Group
11
1998-11-01
TLE 4270
Charge Current Id versus Temperature Tj
8 A d 7 6 5 4 3 2 1 0 -40
AED01936
Delay Switching threshold VDU versus Temperature Tj
4.0 V V dT 3.5 3.0
AED01937
d
V = 13.5 V VD = 1 V
2.5 2.0 1.5 1.0 0.5 0 -40
V = 13.5 V V DU
0
40
80
120 C 160 Tj
0
40
80
120 C 160 Tj
Semiconductor Group
12
1998-11-01
TLE 4270
Package Outlines P-TO220-5-1 (Plastic Transistor Single Outline)
10 +0.4 10.2 -0.2 3.75
+0.1
4.6 -0.2
1x45
1.27
2.8
+0.1
19.5 max 16 0.4
8.8 -0.2
2.6 1 1.7 0.8
+0.1 1)
5
0.4 +0.1
0.6
M
5x
4.5 0.4 8.4 0.4
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Semiconductor Group 13
Dimensions in mm 1998-11-01
GPT05107
1) 1-0.15 at dam bar (max 1.8 from body) 1) 1-0.15 im Dichtstegbereich (max 1.8 vom Korper)
8.6 0.3 10.2 0.3
15.4 0.3
TLE 4270
P-TO220-5-2 (Plastic Transistor Single Outline)
10 +0.4 10.2 -0.2 3.75
+0.1
4.6 -0.2
1x45
1.27
2.8
+0.1
10.9 0.2
1 1.7
5
12.9 0.2
0.4 +0.1 0.8 +0.1 1)
0.6
M
2.6 0.15
5x 1) 1-0.15 at dam bar (max 1.8 from body) 1) 1-0.15 im Dichtstegbereich (max 1.8 vom Korper)
GPT05256
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Semiconductor Group 14
8.8 -0.2
15.4 0.3
Dimensions in mm 1998-11-01
TLE 4270
P-TO220-5-11 (Plastic Transistor Single Outline)
10 0.2 9.8 0.15 8.5 1) 3.7-0.15 4.4 1.27 0.1 A
15.65 0.3
1)
170.3
2.8 0.2
13.4
0.05
8.6 0.3
10.2 0.3
C 0...0.15
3.70.3
9.25 0.2
0.5 0.1 3.9 0.4
0.8 0.1 1.7 0.25
M
2.4 AC
8.4 0.4
1)
Typical All metal surfaces tin plated, except area of cut.
GPT09064
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Semiconductor Group 15
Dimensions in mm 1998-11-01
TLE 4270
P-TO220-5-12 (Plastic Transistor Single Outline)
10 0.2 9.8 0.15 8.5 3.7 -0.15
1)
A B 4.4 1.27 0.1
15.65 0.3
1)
170.3
2.8 0.2
13.4
0.05
110.5
C 0...0.15 1.7
13 0.5
6x 0.8 0.1 0.25
M
0.5 0.1 2.4 ABC
1)
Typical All metal surfaces tin plated, except area of cut.
GPT09065
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Semiconductor Group 16
9.25 0.2
Dimensions in mm 1998-11-01
TLE 4270
P-TO263-5-1 (Plastic Transistor Single Outline)
10 0.2 9.8 0.15 A 8.5 1) 1.27 0.1 B 0.1 2.4 4.4
9.25 0.2
10.3
0.05
(15)
8 1)
0...0.15 5x0.8 0.1 4x1.7
8 max.
4.7 0.5
2.7 0.3
0.5 0.1
0.25
1)
M
AB
0.1
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 17
Dimensions in mm 1998-11-01
GPT09113
Typical All metal surfaces tin plated, except area of cut.
TLE 4270
P-TO220-5-8 (Plastic Transistor Single Outline)
4.6 1.27 10.2 8.0 1)
3.5
0.2 2.6
10.1
0.8 1.7 4 x 1.7 = 6.8
0.4
GPT05873
1) shear and punch direction burr free surface
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 18
1.5
8.8
Dimensions in mm 1998-11-01
TLE 4270
P-TO252-5-1 (Plastic Transistor Single Outline)
2.3 +0.05 -0.10 B A 1 0.1 0...0.15 0.9 +0.08 -0.04
6.5 +0.15 -0.10
1 0.1
5.4 0.1
9.9 0.5 6.22 -0.2
0.8 0.15
(4.17)
0.15 max per side
0.51 min
5x0.6 0.1 1.14
0.5 +0.08 -0.04 0.1
4.56
0.25
M
AB
GPT09161
All metal surfaces tin plated, except area of cut.
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 19
Dimensions in mm 1998-11-01


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